KGD Workshop 2020

MEPTEC and IMAPS present a special full-day workshop as part of the Semiconductor Industry Speaker Series

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Known Good Die (KGD) Workshop

Wednesday September 16, 2020

SEMI Global Headquarters
 673 South Milpitas Blvd., Milpitas, CA 95035, USA

KGD Powering More than Moore!

With the demise of Moore’s Law due to the economics of advanced semiconductor process nodes, the demand for greater cost performance and differentiation has fueled the development of advanced packaging. Having Known Good Die (KGD) is essential for many, if not all, of the current ‘crop’ of advanced semiconductor packaging.

Join us at the 20th annual Known Good Die Workshop on Wednesday September 16, 2020 for a cross-functional view of challenges and solutions for achieving KGD!

To receive email updates about KGD Workshop please sign-up for the MEPTEC email list.


KGD Workshop postponed to Wednesday September 16.

Updated program and registration coming soon.

8:00 a

Registration Opens


9:00 a

Keynote/ Market Overview


 
 
Opening Remarks

Ira Feldman
MEPTEC

 
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Keynote - Making KGD silicon work in your supply chain

David Greenlaw
Nvidia

The slowdown of Moore’s Law scaling has accelerated the adoption of advanced packaging and ‘Known Good Die’ silicon. Although most industry presentations focus on the technologies and business cases involved, there is evidence that working cultures throughout the supply chain will need to evolve as well in this new era. Foundries, component suppliers and OSATs will not be able to rely only on their historical strengths as our industry changes. We’ll examine leading-edge products that contain examples of these trends and discuss some surprising initiatives that were required for those products to achieve overall success in high-volume production.



 
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After 30 Years Why Are We Still Talking about Known Good Die?


Jan Vardaman
Techsearch International

10:30 a

Networking Break

10:45 a

3D - Data Driven Decisions


 
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End to End Data

Yuri MItnick & Zoe Conroy
Cisco


 
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Improving SiP Quality and Reducing Cost Through the Use of Machine Learning and Predictive Analytics

Jeff David
PDF Solutions

 
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Advanced Packaging Failure Analysis Challenges

Bernice Zee
AMD

12:15 p

Lunch


1:30 p

3F - Future Forcing Functions


 
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Shift Left

David Armstrong
Advantest

 
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Scan Test Delivery Leveraging Functional High-speed I/O for
Portable, High-bandwidth Test

Brian Archer
Synopsys

3:00 p

 Networking Break


3:30 p

3T - Today’s Tooling Technology


 
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Die Sorting & Inspection

Gerald Steinwasser
Muhlbauer

 
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Die Crack Prevention and Detection in Advanced Packaging
Woo Young Han
Onto Innovation


 
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Probably Good Die Testing for Advanced Packaging
Amy Leong
Formfactor


5:00 p

Networking


6:00 p

Adjourn





Program subject to change without notice